//==========================================================================
// Copyright (c) 2000-2008,  Elastos, Inc.  All Rights Reserved.
//==========================================================================

#if !defined (_POWER_H_)
#define _POWER_H_

class CPower : public CDeviceDriver {
public:
    CARAPI Read(
        /* [in] */ Int64 u64Offset,
        /* [in] */ Int32 bytesToRead,
        /* [out] */ MemoryBuf * pBuffer,
        /* [out] */ IEvent * * ppCompletionEvent);

    CARAPI Write(
        /* [in] */ Int64 u64Offset,
        /* [in] */ const MemoryBuf &buffer,
        /* [out] */ Int32 * pBytesWritten,
        /* [out] */ IEvent * * ppCompletionEvent);

    CARAPI Control(
        /* [in] */ Handle32 nControlCode,
        /* [in] */ const MemoryBuf &inBuffer,
        /* [out] */ MemoryBuf * pOutBuffer,
        /* [out] */ IEvent * * ppCompletionEvent);

    virtual void Dispose(){}
    void EnableAutoSleepTest(Boolean AutoTest);

};

#define 	VOLT_MIN	0x0
#define 	VOLT_LOW	0x1
#define	VOLT_HIGH	0x2
#define	VOLT_MAX	0x3
#define CLK_SRAM 0x00100000
struct core_freq{
	unsigned int frequency;
	unsigned int mHZ;
	unsigned int L;
	unsigned int twoN;
	unsigned int turbo;
	unsigned int b;
	unsigned int volt;
};

ECode pcf50606_init(void);
void pcf50606_pmu_set_voltage( const char *regname, int value );
void GPIO_Reset();
#ifdef  __cplusplus
extern "C" {
#endif

struct core_freq cpu_freq_volt []= {
	{13, 13, 1, 2, 1, 1, VOLT_MIN},
	{104, 104, 8, 2, 1, 1, VOLT_LOW},
	//{156, 8, 6, 1, 1, VOLT_LOW},
	{208, 208, 16, 2, 1, 1, VOLT_HIGH},
	//{104, 8, 6, 1, 1, VOLT_HIGH }, //312/104/104/104
	{312, 208, 16, 3, 1, 1, VOLT_MAX}, //312/208/208/104
	{416, 208, 16, 4, 1, 1, VOLT_MAX}, //416/208/208/104
	{91, 0, 7, 2, 0, 0, VOLT_LOW} //91MHz not used in normal mode
};

void pxa_cpu_suspend(void);
int get_cpu_mode();
void pxa_cpu_resume(void);
EXTERN_C Address GetSP(void);
EXTERN_C UInt32 save_flags_cli();
EXTERN_C void restore_flags(UInt32);
#define BASE_FREQ   13000000
EXTERN_C Address sleep_save_sp;
EXTERN_C void WritePWRMODE(int);
EXTERN_C void WriteCLKCFG(int);

/*for auto sleep test*/
ECode PowerCreateTimer(int *pTimerID,unsigned long Resolution,unsigned  Interval,TimerCallBackProc pCallbackProc,void * pvArg);
ECode PowerKillTimer(int TimerID);
ECode PowerStartTimer(int TimerID);
ECode PowerStopTimer(int TimerID);
ECode PowerReStartTimer(int TimerID,int Interval);
ECode PowerSetTimerInterval(int TimerID, int Interval);

#define RTSR        __REG(0x40900008)
#define PIAR        __REG(0x40900038)
#define RTCPICR     __REG(0x40900034)
#define RCNR        __REG(0x40900000)
#define RTAR        __REG(0x40900004)

unsigned long Read_PMNC();
unsigned long Read_CCNT();
unsigned long Read_INTE();
unsigned long Read_FLAG();
unsigned long Read_EVTS();
unsigned long Read_PMN0();
unsigned long Read_PMN1();
unsigned long Read_PMN2();
unsigned long Read_PMN3();

void Write_PMNC(unsigned long);
void Write_INTE(unsigned long);
void Write_FLAG(unsigned long);
void Write_EVTS(unsigned long);

#ifdef  __cplusplus
}
#endif
#define SAVE(x)     sleep_save[SLEEP_SAVE_##x] = x
#define RESTORE(x)  x = sleep_save[SLEEP_SAVE_##x]
#define _HAL_EnterCritical(s)   (s = 1)
#define _HAL_LeaveCritical(s)   (s = 0)
#endif //_POWER_H_
